Almost all the AVR's support the ISP programming. ISP stands for In-system Programming which means that these microcontrollers can be programmed while they are with in the end circuit. This reduces cost and time for programming and also reduces the programming difficulty. In-System Programming allows programming and reprogramming of any AVR microcontroller positioned inside the end system. Using a simple Three-wire SPI interface, the In-System Programmer communicates serially with the AVR microcontroller, reprogramming all non-volatile memories on the chip.The info about the ISP programming is provided in the AVR doc0943.
For In-System Programming, the programmer is connected to the target using as few wires as possible. To program any AVR microcontroller in any target system, a simple Six-wire interface is used to connect the programmer to the target PCB.The Serial Peripheral Interface (SPI) consists of three wires: Serial ClocK (SCK),
Master In – Slave Out (MISO) and
Master Out – Slave In (MOSI).
In In-System Programming the programmer always operate as the Master, and the target system always operate as the Slave. The In-System Programmer (Master) provides the clock for the communication on the SCK Line. Each pulse on the SCK Line transfers one bit from the Programmer (Master) to the Target (Slave) on the Master Out – Slave In (MOSI) line. Simultaneously, each pulse on the SCK Line transfers one bit from the target (Slave) to the Programmer (Master) on the Master In – Slave Out (MISO) line.
Settings to Program the AVR chip:
- To erase the chip:the Reset has to be pulsed to end the Chip Erase cycle.
- To enter and stay in Serial Programming Mode:the AVR microcontroller reset line has to be kept active (low).
To acheive both of them at any time during programming the control to the reset line of the AVR chip is given to the ISP programmer and thus the ground of the Programmer must be connected to the ground of the AVR chip and the maximum voltage of the ISP must be with in the VCC range of the AVR i.e between 3-6V.
To allow programming of targets running at any allowed voltage (2.7 - 6.0 V), the programmer can draw power from the target system (VCC). This eliminate the need for a separate power supply for the programmer. Alternatively, the target system can be supplied from the programmer at programming time, eliminating the need to power the target system through its regular power connector for the duration of the programming cycle.
Design Considerations:
To allow In-System Programming of the AVR microcontroller, the In-System Programmer must be able to override the pin functionality during programming. This section describes the details of each pin used for the programming operation.
Recommendations when Designing Hardware Supporting In-System Programming
Programming Sequence
- Power-up sequence: Apply power between VCC and GND while RESET and SCK are set to “0”. In some systems, the programmer can not guarantee that SCK is held low during power-up. In this case, RESET must be given a positive pulse of at least two CPU clock cycles duration after SCK has been set to “0”.
- Wait for at least 20ms and enable SPI Serial Programming by sending the Programming Enable serial instruction to pin MOSI.
- The SPI Serial Programming instructions will not work if the communication is out of synchronization. When in sync. the second byte ($53), will echo back when issuing the third byte of the Programming Enable instruction. Whether the echo is correct or not, all four bytes of the instruction must be transmitted. If the $53 did not echo back, give RESET a positive pulse and issue a new Programming Enable command.
- The Flash is programmed one page at a time . The memory page is loaded one byte at a time by supplying the 6 LSB of the address and data together with the Load Program Memory Page instruction. To ensure correct loading of the page, the data low byte must be loaded before data high byte is applied for a given address. The Program Memory Page is stored by loading the Write Program Memory Page instruction with the 8 MSB of the address. If polling is not used, the user must wait at least tWD_FLASH before issuing the next page. . Accessing the SPI Serial Programming interface before the Flash write operation completes can result in incorrect programming.
- The EEPROM array is programmed one byte at a time by supplying the address and data together with the appropriate Write instruction. An EEPROM memory location is first automatically erased before new data is written. If polling is not used, the user must wait at least tWD_EEPROM before issuing the next byte. In a chip erased device, no $FFs in the data file(s) need to be programmed
- Any memory location can be verified by using the Read instruction which returns the content at the selected address at serial output MISO.
- At the end of the programming session, RESET can be set high to commence normal operation.
- Power-off sequence (if needed): Set RESET to “1”.
Turn VCC power off.
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